Massive speed-up and energy saving by CPU to FPGA migration (vN2RC)

vN2RC stands for "(migration from) von Neumann to Reconfigurable Computing"

Several research projects investigated the benefit of migrating particular applications from software running on (von Neumann type) CPUs, over to configware running on FPGAs. Fig. 1 summarizes some results. Speed-up factors range up to 4 orders of magnitude. Energy saving factors reported (not shown in this figure) typicaly are about 10% of the speed-up factor - i. e. ranging up to 3 orders of magnitude.

Highest factors I know have been reported from George Washington University (fig. 2).

The factors obtained by the lambda-grid-based design rule check (fig. 1, PISA project) used the much more area-efficient PLA-inspired DPLA instead of FPGAs. This was possible, since the application data could completely be represented by canonical Boolean expressions.

The Reconfigurable Computing Paradox

The area efficiency of FPGAs is rather limited. For instance, within a typical classical FPGA about 4 transistors may serve the application, wheareas the other 96 % are occupied for routing resources, i. e. are needed for reconfigurability. Why does such a bad technology yield such excellent performance results? This paradox is explained by the von Neumann syndrome [1 - 5].


              Fig. 1


[1]  Reiner Hartenstein (invited paper): The von Neumann Syndrome; K. Bertels et al. (editors): The Future of Computing - Essays in memory of Stamatis Vassiliadis; TU Delft, 2007   ISBN: 978-90-807957-3-0 NUR 958

[2] Christphe Bobda: Introduction to Reconfigurable Computing Systems; 2007, Springer-Verlag
[3] R. Hartenstein (invited chapter): Basics of Reconfigurable Computing; in: J. Henkel, S. Parameswaran (editors): Designing Embedded Processors. A Low Power Perspective; Springer Verlag, March 2007
[4] R. Hartenstein (invited chapter): Morphware and Configware; in Albert Zomaya (ed.): Handbook of Nature-Inspired and Innovative Computing: Integrating Classical Models with Emerging Technologies; Springer, 2006
[5] R. Hartenstein  (invited chapter): The Paramountcy of Reconfigurable Computing; in: Young-Choon Lee,. Albert Zomaya (editors): Energy Aware Distributed Computing Systems; 2012, Wiley & Sons

                        Fig. 2