Keynote Speakers

 

Hong Jiang

Hong Jiang

 Department of Computer Science and Engineering 

University of Nebraska - Lincoln 

 http://cse.unl.edu/~jiang/

An Application-Aware Approach to Systems Support for Big Data

Everyday 2.5 quintillion (2.5x1018, or 2.5 million trillion) bytes of data are created by people. This data comes from everywhere: from traditional scientific computing and on-line transactions, to popular social network and mobile applications. Data produced in the last two years alone amounts to 90% of the data in the world today! This phenomenal growth and ubiquity of data has ushered in an era of “Big Data”, which brings with it new challenges as well as opportunities. In this talk, I will first discuss big data challenges facing computer and storage systems research, brought on by the huge volume, high velocity, great variety and veracity with which digital data are being produced in the world. I will first introduce some new and ongoing programs at NSF that are relevant to Big Data and to ASAP. I will then present research being conducted in my research group that seeks a scalable systems and application-aware approach to addressing some of the challenges, from the many core and storage architectures to the systems and up to the applications.

 

BIO:

Dr. Hong Jiang has been on leave as a Program Director in the CCF division of the CISE directorate at the National Science Foundation since January 2013 from University of Nebraska-Lincoln where he is Willa Cather Professor of Computer Science and Engineering. He received the B.Sc. degree and the M.A.Sc. degree, both in Computer Engineering, from Huazhong University of Science and Technology, China, and the University of Toronto, Canada respectively; and the PhD degree in Computer Science from the Texas A&M University, USA. His areas of research emphasis include computer architecture, computer storage systems, high-performance computing, big data computing, and cloud computing. He has over 200 publications in major journals and international conferences in these areas. He has graduated 12 Ph.D. students who upon their graduations either landed academic tenure-track positions in Ph.D.-granting US institutions or were employed by major US IT corporations. He serves as an Associate Editor of the IEEE Transactions on Parallel and Distributed Systems. 

 

Josep Torrellas

Josep Torrellas

Computer Science Department

University of Illinois, Urbana-Champaign

http://iacoma.cs.uiuc.edu/~torrellas

Extreme Scale Computer Architecture: Energy Efficiency from the Ground Up 

As we move to higher levels of integration, it is clear that power and energy efficiency are the most formidable barriers. A chip built out of 1000 cores requires fundamentally rethinking the whole compute stack from the ground up for energy efficiency. Often, energy efficiency is in direct conflict with resilience. In this talk, I will describe some of the architecture technologies that we are exploring, based on low voltage operation and streamlined architectures.

 

BIO:

Dr. Josep Torrellas is a Professor of Computer Science and (by courtesy) Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (UIUC). He is a Fellow of IEEE and ACM. He is the Director of the Center for Programmable Extreme-Scale Computing, a center funded by DARPA, DOE, and NSF that focuses on architectures for extreme energy and power efficiency. He also directs the Intel-Illinois Parallelism Center (I2PC), a center created by Intel to advance parallel computing in clients. He has made contributions to parallel computer architecture in the areas of shared-memory multiprocessor organizations, cache hierarchies and coherence protocols, thread-level speculation, and hardware and software reliability. He received a Ph.D. from Stanford University.

 

Sun-Yuan KungSun-Yuan Kung

Electrical Engineering Department

Princeton University

http://www.princeton.edu/~kung/

From Green Computing to Big-Data Learning: A Kernel Learning Perspective

The SVM learning model  has been successfully applied to an  enormously broad spectrum of application domains and has become a main stream of the modern machine learning technologies.  Unfortunately,  along with its success and popularity,  there also raises a grave concern on it suitability for big data learning applications.  For example, in some biomedical applications, the sizes may be  hundreds of thousands.  In social media application, the sizes could  be easily in the order of millions.  This curse of dimensionality represents   a new challenge calling  for new  learning paradigm as well as application-specific parallel and distributed hardware and software.

This talk will explore cost-effective  design on kernel-based machine learning and classification for  big data learning applications.  It will present a recursive tensor based classification algorithm, especially amenable to systeolic/wavefront array processors, whixh may  potentially expedite real-time prediction speed by orders of magnitude. For time-series analysis, with nonstationary  environment, it is vital to develop time-adaptive learning algorithms so as to allow incremental and active learning.  The talk will tackle the active learning  problems  from  two kernel-induced perspectives, one in intrinsic space and another in empirical space.  The talk will show, if time permits,  an algorithmic example highlighting the application of Map-Reduce technologies to supervised kernel (Slackmin) learning under a parallel and distributed processing framework.

 

BIO:

Dr. S.Y. Kung is a Professor at Department of Electrical Engineering in Princeton University. His research areas include VLSI array processors, system modeling and identification, machine learning, wireless communication, sensor array processing, multimedia signal processing, and genomic signal processing and data mining. He was a founding member of several Technical Committees (TC) of the IEEE Signal Processing Society, and was appointed as the first Associate Editor in VLSI Area (1984) and later the first Associate Editor in Neural Network (1991) for the IEEE Transactions on Signal Processing. He has been a Fellow of IEEE since 1988. He served as a Member of the Board of Governors of the IEEE Signal Processing Society (1989-1991). Since 1990, he has been the Editor-In-Chief of the Journal of VLSI Signal Processing Systems. He was a recipient of IEEE Signal Processing Society's Technical Achievement Award for the contributions on "parallel processing and neural network algorithms for signal processing" (1992); a Distinguished Lecturer of IEEE Signal Processing Society (1994); a recipient of IEEE Signal Processing Society's Best Paper Award for his publication on principal component neural networks (1996); and a recipient of the IEEE Third Millennium Medal (2000). He has authored and co-authored more than 500 technical publications and numerous textbooks including "VLSI and Modern Signal Processing", Prentice-Hall (1985), "VLSI Array Processors", Prentice-Hall (1988); ``Digital Neural Networks'', Prentice-Hall (1993) ; ``Principal Component Neural Networks'', John-Wiley (1996); ``Biometric Authentication: A Machine Learning Approach'', Prentice-Hall (2004); and ``Kernel Methods and Machine Learning”. Cambridge University Press (2013).  



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